User Guide
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... Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet 1 Overview Chapter 1 The AMD Athlon™ XP processor model 6 with an integrated, exclusive L2 cache, which supports the growing processor and system bandwidth requirements of the AMD Athlon XP processor model 6 are QuantiSpeed™ architecture, a high-performance full-speed cache, a 266-MHz, 2.1-Gigabyte per second system bus, and 3DNow!™ Professional technology. The AMD Athlon XP processor model...
... Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet 1 Overview Chapter 1 The AMD Athlon™ XP processor model 6 with an integrated, exclusive L2 cache, which supports the growing processor and system bandwidth requirements of the AMD Athlon XP processor model 6 are QuantiSpeed™ architecture, a high-performance full-speed cache, a 266-MHz, 2.1-Gigabyte per second system bus, and 3DNow!™ Professional technology. The AMD Athlon XP processor model...
User Guide
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...swing-signaling technology, that require a reference voltage (VREF). 24309E-March 2002 Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet 2 Interface Signals 2.1 Overview The AMD Athlon™ system bus architecture is asserted or deasserted by enterprise-class application software. The ...as well as the high-performance required by the source. The system bus architecture consists of three high-speed channels (a unidirectional processor request channel, a unidirectional probe channel, and a 64-bit bidirectional data channel), source-synchronous clocking, and...
...swing-signaling technology, that require a reference voltage (VREF). 24309E-March 2002 Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet 2 Interface Signals 2.1 Overview The AMD Athlon™ system bus architecture is asserted or deasserted by enterprise-class application software. The ...as well as the high-performance required by the source. The system bus architecture consists of three high-speed channels (a unidirectional processor request channel, a unidirectional probe channel, and a 64-bit bidirectional data channel), source-synchronous clocking, and...
User Guide
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... Management Chapter 4 Note: * The Connect special cycle is only issued after CLKFWDRST is deasserted. Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet 24309E-March 2002 1 Disconnect Pending 3/A Connect 2/B Disconnect 6/B Connect Pending 2 5 ...Processor receives a wake-up event and must cancel the disconnect request. 3 Deassert PROCRDY and slow down internal clocks. 4 Processor wake-up event or CONNECT asserted by Northbridge. 5 CLKFWDRST is deasserted by the Northbridge. Figure 7. B Issue a Connect special cycle.* C Return internal clocks to full speed...
... Management Chapter 4 Note: * The Connect special cycle is only issued after CLKFWDRST is deasserted. Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet 24309E-March 2002 1 Disconnect Pending 3/A Connect 2/B Disconnect 6/B Connect Pending 2 5 ...Processor receives a wake-up event and must cancel the disconnect request. 3 Deassert PROCRDY and slow down internal clocks. 4 Processor wake-up event or CONNECT asserted by Northbridge. 5 CLKFWDRST is deasserted by the Northbridge. Figure 7. B Issue a Connect special cycle.* C Return internal clocks to full speed...
User Guide
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... Enhanced Programmable Read Only Memory FIFO First In, First Out GART Graphics Address Remapping Table HSTL High-Speed Transistor Logic IDE Integrated Device Electronics IPC Instructions Per Cycle ISA Industry Standard Architecture JEDEC Joint Electron Device Engineering Council 80 Appendix A Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet 24309E-March 2002 Table 23.
... Enhanced Programmable Read Only Memory FIFO First In, First Out GART Graphics Address Remapping Table HSTL High-Speed Transistor Logic IDE Integrated Device Electronics IPC Instructions Per Cycle ISA Industry Standard Architecture JEDEC Joint Electron Device Engineering Council 80 Appendix A Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet 24309E-March 2002 Table 23.