Maintenance and Service Guide
Page 114
... Disable Non-Maskable Interrupt (NMI) Get CPU type Initialize system hardware Disable shadow and execute code from ROM Initialize chipset with a clean boot, it halts POST after issuing a beep code and/or displaying a message (see POST ...repair. 1. Beep Codes 1 1-2 1-1-1-3 1-1-1-4 1-1-2-1 1-1-2-3 1-1-2-4 1-1-3-1 1-1-3-2 1-1-3-3 1-1-3-4 1-1-4-1 1-1-4-3 1-1-4-4 1-2-1-1 Table 3-4. Press the reset button to return the notebook to start the notebook. Power-On Self-Test NOTE: If Quiet Boot is enabled in BIOS Setup (the default setting), press esc during boot to see the following...
... Disable Non-Maskable Interrupt (NMI) Get CPU type Initialize system hardware Disable shadow and execute code from ROM Initialize chipset with a clean boot, it halts POST after issuing a beep code and/or displaying a message (see POST ...repair. 1. Beep Codes 1 1-2 1-1-1-3 1-1-1-4 1-1-2-1 1-1-2-3 1-1-2-4 1-1-3-1 1-1-3-2 1-1-3-3 1-1-3-4 1-1-4-1 1-1-4-3 1-1-4-4 1-2-1-1 Table 3-4. Press the reset button to return the notebook to start the notebook. Power-On Self-Test NOTE: If Quiet Boot is enabled in BIOS Setup (the default setting), press esc during boot to see the following...
Maintenance and Service Guide
Page 115
... data bits xxxx of low byte of memory bus Enable cache before system BIOS shadow RAM failure on data bits xxxx of high byte of chipset registers Load alternate registers with initial POST values Restore CPU control word during warm boot Initialize PCI Bus Mastering devices Initialize keyboard controller BIOS ROM...
... data bits xxxx of low byte of memory bus Enable cache before system BIOS shadow RAM failure on data bits xxxx of high byte of chipset registers Load alternate registers with initial POST values Restore CPU control word during warm boot Initialize PCI Bus Mastering devices Initialize keyboard controller BIOS ROM...
Maintenance and Service Guide
Page 118
... serial disk Redirect Int 10h to enable remote serial video Re-map I/O and memory for PCMCIA Initialize digitizer and display message Unknown interrupt Initialize the chipset Initialize the bridge Initialize the CPU Initialize system timer Initialize system I/O Check force recovery boot Checksum BIOS ROM Go to BIOS Set Huge Segment Initialize...
... serial disk Redirect Int 10h to enable remote serial video Re-map I/O and memory for PCMCIA Initialize digitizer and display message Unknown interrupt Initialize the chipset Initialize the bridge Initialize the CPU Initialize system timer Initialize system I/O Check force recovery boot Checksum BIOS ROM Go to BIOS Set Huge Segment Initialize...
Service Manual
Page 67
... to 50° C (-4 to 95° F). Super I /O: integrated in core logic. 802.11b wireless LAN: Ambit with Intersil Prism 2.5 chipset. IEEE 1394: TI TSB43AB22. or CPU: Intel Mobile Celeron processor. Keyboard/embedded controller: National PC87570. Modem (certain models) Wireless LAN (certain models...controller: National PC87570. LAN: National NS83815. 802.11b wireless LAN: Ambit with DDC support. Core logic: VIA Twister-T + VT8231 chipset. Display controller: S3 Savage Pro integrated in core logic. CardBus controller: O2Micro 6912. Super I /O: integrated in core logic. LAN:...
... to 50° C (-4 to 95° F). Super I /O: integrated in core logic. 802.11b wireless LAN: Ambit with Intersil Prism 2.5 chipset. IEEE 1394: TI TSB43AB22. or CPU: Intel Mobile Celeron processor. Keyboard/embedded controller: National PC87570. Modem (certain models) Wireless LAN (certain models...controller: National PC87570. LAN: National NS83815. 802.11b wireless LAN: Ambit with DDC support. Core logic: VIA Twister-T + VT8231 chipset. Display controller: S3 Savage Pro integrated in core logic. CardBus controller: O2Micro 6912. Super I /O: integrated in core logic. LAN:...
Service Manual
Page 155
...following table). If the BIOS detects a terminal error condition, it requires repair. 1. Set IN POST flag. Initialize caches to start the notebook. Reset Programmable Interrupt Controller. Test DRAM refresh. Press the power button to initial POST values. Disable shadow and execute code from ROM...., confirm the failure by performing a "clean" boot, as described below. Press the reset button to return the notebook to a known state. 4. RAM failure on data bits xxxx of high byte of chipset registers. Shadow video BIOS ROM. 3-20 Troubleshooting and Diagnostics Service Manual
...following table). If the BIOS detects a terminal error condition, it requires repair. 1. Set IN POST flag. Initialize caches to start the notebook. Reset Programmable Interrupt Controller. Test DRAM refresh. Press the power button to initial POST values. Disable shadow and execute code from ROM...., confirm the failure by performing a "clean" boot, as described below. Press the reset button to return the notebook to a known state. 4. RAM failure on data bits xxxx of high byte of chipset registers. Shadow video BIOS ROM. 3-20 Troubleshooting and Diagnostics Service Manual
Service Manual
Page 157
... Int 10h to Full DOS. Check force recovery boot. Shadow Boot Block. Initialize Run Time Clock. Output one beep. PnPnd dual CMOS (optional). Initialize the chipset. Initialize the bridge. Initialize System Management Manager. Initialize error logging. Unknown interrupt. Initialize system I /O and memory for PCMCIA. Go to Memory Technologies Devices such as...
... Int 10h to Full DOS. Check force recovery boot. Shadow Boot Block. Initialize Run Time Clock. Output one beep. PnPnd dual CMOS (optional). Initialize the chipset. Initialize the bridge. Initialize System Management Manager. Initialize error logging. Unknown interrupt. Initialize system I /O and memory for PCMCIA. Go to Memory Technologies Devices such as...