Manual
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... Page 4 V 1.01 It was designed to kOOPa). See paragraph 3. Foreword Game BoyTM CPU Manual 1. It contains opcodes, time duration and the affected flags per ASM command and the. This will need additional documents for GBC specific programming). Also, a timing diagram of several documents from 'Game Boy Assembly Language Primer (GALP) V1.0'by GABY (GAmeBoY). The...
... Page 4 V 1.01 It was designed to kOOPa). See paragraph 3. Foreword Game BoyTM CPU Manual 1. It contains opcodes, time duration and the affected flags per ASM command and the. This will need additional documents for GBC specific programming). Also, a timing diagram of several documents from 'Game Boy Assembly Language Primer (GALP) V1.0'by GABY (GAmeBoY). The...
Manual
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... to inform a user on the hand-held game machine known as Game Boy, manufactured and designed by Nintendo Co., LTD. Terms GB = Original GameBoy (GameBoy Classic) GBP = GameBoy Pocket/GameBoy Light GBC = GameBoy Color SGB = Super GameBoy by Nintendo Co., LTD. Forward: The following was typed up for educational purposes and higher learning. 2.2. GameBoy is not presented for monetary gain, but for...
... to inform a user on the hand-held game machine known as Game Boy, manufactured and designed by Nintendo Co., LTD. Terms GB = Original GameBoy (GameBoy Classic) GBP = GameBoy Pocket/GameBoy Light GBC = GameBoy Color SGB = Super GameBoy by Nintendo Co., LTD. Forward: The following was typed up for educational purposes and higher learning. 2.2. GameBoy is not presented for monetary gain, but for...
Manual
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... The GameBoy uses ...Nintendo documents describe the CPU & instructions speed in machine cycles while this document describes them in clock cycles. In many ways the processor is the translation: 1 machine cycle = 4 clock cycles Machine Cycles Clock Cycles GB CPU Speed 1.05MHz 4.19MHz NOP Instruction 1 cycle 4 cycles 2.4. Here is more similar to an Intel 8080. Game Boy... Specs • CPU: 8-bit (Similar to the Z80, some instructions Page 6 V 1.01 Compared to the Z80 processor.) • Main RAM:...
... The GameBoy uses ...Nintendo documents describe the CPU & instructions speed in machine cycles while this document describes them in clock cycles. In many ways the processor is the translation: 1 machine cycle = 4 clock cycles Machine Cycles Clock Cycles GB CPU Speed 1.05MHz 4.19MHz NOP Instruction 1 cycle 4 cycles 2.4. Here is more similar to an Intel 8080. Game Boy... Specs • CPU: 8-bit (Similar to the Z80, some instructions Page 6 V 1.01 Compared to the Z80 processor.) • Main RAM:...
Manual
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Hudson HuC-3 by DP Page 11 Reserved Memory 0104-0133 Scrolling Nintendo graphic: CE ED 66 66 CC 0D 00 0B 03 73 00 83 00 0C 00 0D ...0134-0142 Title of licensee code (new). (These are normally $00 if [$014B] $33.) 0146 GB/SGB Indicator (00 = GameBoy, 03 = Super GameBoy functions) (Super GameBoy functions won't work if $03.) 0147 Cartridge type: 0-ROM ONLY 12-ROM+MBC3+RAM 1-ROM+MBC1 13-ROM+MBC3+RAM+BATT ... GB 0144 Ascii hex digit, high nibble of licensee code (new). 0145 Ascii hex digit, low nibble of the game in UPPER CASE ASCII. Game BoyTM CPU Manual Locations 2.5.4.
Hudson HuC-3 by DP Page 11 Reserved Memory 0104-0133 Scrolling Nintendo graphic: CE ED 66 66 CC 0D 00 0B 03 73 00 83 00 0C 00 0D ...0134-0142 Title of licensee code (new). (These are normally $00 if [$014B] $33.) 0146 GB/SGB Indicator (00 = GameBoy, 03 = Super GameBoy functions) (Super GameBoy functions won't work if $03.) 0147 Cartridge type: 0-ROM ONLY 12-ROM+MBC3+RAM 1-ROM+MBC1 13-ROM+MBC3+RAM+BATT ... GB 0144 Ascii hex digit, high nibble of licensee code (new). 0145 Ascii hex digit, low nibble of the game in UPPER CASE ASCII. Game BoyTM CPU Manual Locations 2.5.4.
Manual
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... 2 - 64kBit = 8kB = 1 bank 3 - 256kBit = 32kB = 4 banks 4 - 1MBit =128kB =16 banks 014A Destination code: 0 - Non-Japanese 014B Licensee code (old): 33 - Japanese 1 - Accolade A4 - Konami (Super GameBoy function won't work if $33.) 014C Mask ROM Version number (Usually $00) Page 12 V 1.01 2.5.4. Reserved Memory Locations Game BoyTM CPU Manual F-ROM+MBC3+TIMER+BATT FF -
... 2 - 64kBit = 8kB = 1 bank 3 - 256kBit = 32kB = 4 banks 4 - 1MBit =128kB =16 banks 014A Destination code: 0 - Non-Japanese 014B Licensee code (old): 33 - Japanese 1 - Accolade A4 - Konami (Super GameBoy function won't work if $33.) 014C Mask ROM Version number (Usually $00) Page 12 V 1.01 2.5.4. Reserved Memory Locations Game BoyTM CPU Manual F-ROM+MBC3+TIMER+BATT FF -
Manual
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.../8KByte RAM or 4Mbit ROM/32KByte RAM. X = Don't cares, B = bank select bits) into 6000-7FFF area will run on power up. Values of the result. (GameBoy ignores this value.) 2.6. Cartridge Types The following define the byte at 4000-7FFF. by adding all bytes of a cartridge except for two checksum bytes and..., if incorrect.) 014E-014F Checksum (higher byte first) produced by DP Page 13 The MBC1 defaults to ROM bank 1. Writing a value (XXXBBBBB - S = 1 selects 4/32 mode. Game BoyTM CPU Manual Locations 2.5.4. S = 0 selects 16/8 mode.
.../8KByte RAM or 4Mbit ROM/32KByte RAM. X = Don't cares, B = bank select bits) into 6000-7FFF area will run on power up. Values of the result. (GameBoy ignores this value.) 2.6. Cartridge Types The following define the byte at 4000-7FFF. by adding all bytes of a cartridge except for two checksum bytes and..., if incorrect.) 014E-014F Checksum (higher byte first) produced by DP Page 13 The MBC1 defaults to ROM bank 1. Writing a value (XXXBBBBB - S = 1 selects 4/32 mode. Game BoyTM CPU Manual Locations 2.5.4. S = 0 selects 16/8 mode.
Manual
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...select an appropriate RAM bank at 4000-7FFF. Before you can only be read or write to a RAM bank you have to 2Mbit. Cartridge Types Game BoyTM CPU Manual Rom bank 0 is set the two most significant ROM address lines. * NOTE: The Super Smart Card doesn't require this operation ...provided. X = Don't cares, B = bank select bits) into 0000-1FFF area. Unlike the MBC1 which uses external RAM, MBC2 has 512 x 4 bits of the GameBoy. (NOTE: Nintendo suggests values $0A to enable and $00 to disable RAM bank!!) If memory model is not accessible from 4000-7FFF and can read from false...
...select an appropriate RAM bank at 4000-7FFF. Before you can only be read or write to a RAM bank you have to 2Mbit. Cartridge Types Game BoyTM CPU Manual Rom bank 0 is set the two most significant ROM address lines. * NOTE: The Super Smart Card doesn't require this operation ...provided. X = Don't cares, B = bank select bits) into 0000-1FFF area. Unlike the MBC1 which uses external RAM, MBC2 has 512 x 4 bits of the GameBoy. (NOTE: Nintendo suggests values $0A to enable and $00 to disable RAM bank!!) If memory model is not accessible from 4000-7FFF and can read from false...
Manual
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Game BoyTM CPU Manual 2.6. It still requires an external battery to select a ROM bank: 2100-21FF, 2300-23FF, 2500-25FF, ..., 3F003FFF. For example the following addresses ...-04FF, ..., 1E00-1EFF. The suggested address range to use for MBC2 ram The least significant bit of ROM without requiring any other MBC's run in GameBoy Color double-speed mode but some do (Harvest Moon/Japanese version.) • MBC5 (Memory Bank Controller 5): This controller is the first MBC that is similar...
Game BoyTM CPU Manual 2.6. It still requires an external battery to select a ROM bank: 2100-21FF, 2300-23FF, 2500-25FF, ..., 3F003FFF. For example the following addresses ...-04FF, ..., 1E00-1EFF. The suggested address range to use for MBC2 ram The least significant bit of ROM without requiring any other MBC's run in GameBoy Color double-speed mode but some do (Harvest Moon/Japanese version.) • MBC5 (Memory Bank Controller 5): This controller is the first MBC that is similar...
Manual
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Game BoyTM CPU Manual 2.7. Two musical notes are compared with the following register values: AF=$01-GB/SGB, $FF-GBP, $11-GBC F =$B0 by DP Page 17 Power Up Sequence When the GameBoy is powered up, a 256 byte program starting at memory location 0 is located in the cartridge from $134 to $14d. A ...If any byte fails to compare, then the GameBoy stops comparing bytes and simply halts all of 25 decimal is added to $133 and place this time they are then played on the screen at location $100 with a table in the middle of a Nintendo logo on the internal speaker. Again, the ...
Game BoyTM CPU Manual 2.7. Two musical notes are compared with the following register values: AF=$01-GB/SGB, $FF-GBP, $11-GBC F =$B0 by DP Page 17 Power Up Sequence When the GameBoy is powered up, a 256 byte program starting at memory location 0 is located in the cartridge from $134 to $14d. A ...If any byte fails to compare, then the GameBoy stops comparing bytes and simply halts all of 25 decimal is added to $133 and place this time they are then played on the screen at location $100 with a table in the middle of a Nintendo logo on the internal speaker. Again, the ...
Manual
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... screen goes white with a single dark horizontal line. The GBC screen goes black. 2.7.3. The CPU will only contain known data if the GameBoy code initializes it is not a good idea to value $00 on reset rather than these registers on entry. Stop Mode The STOP command...extend the life of both the CPU and ROM. Low-Power Mode It is pressed. Game BoyTM CPU Manual 2.7.1. It will remain suspended until any button is recommended that GameBoy internal RAM on a real GameBoy contains random data. This command stops the system clock reducing the power consumption of the ...
... screen goes white with a single dark horizontal line. The GBC screen goes black. 2.7.3. The CPU will only contain known data if the GameBoy code initializes it is not a good idea to value $00 on reset rather than these registers on entry. Stop Mode The STOP command...extend the life of both the CPU and ROM. Low-Power Mode It is pressed. Game BoyTM CPU Manual 2.7.1. It will remain suspended until any button is recommended that GameBoy internal RAM on a real GameBoy contains random data. This command stops the system clock reducing the power consumption of the ...
Manual
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This "skipping" does not seem to occur on the GB,GBP, and SGB. Low-Power Mode Game BoyTM CPU Manual is "skipped" when interrupts are disabled (DI) on the GameBoy Color even in regular GB mode. ($143=$00) EXAMPLES from 5 to be incremented TWICE. 76 halt 3C inc a 2) The next...executed as mentioned below. The following the HALT instruction is executed. Depending on the GB,GBP, and SGB as 76 halt Page 20 V 1.01 This instruction skipping doesn't occur when interrupts are disabled (DI) then halt doesn't suspend operation but it does cause the program counter to ...
This "skipping" does not seem to occur on the GB,GBP, and SGB. Low-Power Mode Game BoyTM CPU Manual is "skipped" when interrupts are disabled (DI) on the GameBoy Color even in regular GB mode. ($143=$00) EXAMPLES from 5 to be incremented TWICE. 76 halt 3C inc a 2) The next...executed as mentioned below. The following the HALT instruction is executed. Depending on the GB,GBP, and SGB as 76 halt Page 20 V 1.01 This instruction skipping doesn't occur when interrupts are disabled (DI) then halt doesn't suspend operation but it does cause the program counter to ...
Manual
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... sprite updates ld a,1 ld (VblnkFlag),a pop hl pop de pop bc pop af reti 2.8. Video 2.8.1. Each byte contains a Page 22 V 1.01 2.7.3. Background wraps around the screen (i.e. Registers SCROLLX and SCROLLY hold the coordinates of background to be displayed on the opposite side.) An area of...of 256x256 pixels or 32x32 tiles (8x8 pixels each . Only 160x144 pixels can be displayed. when part of 32 bytes each ). Low-Power Mode Game BoyTM CPU Manual ; **** V-Blank Interrupt Routine **** Vblnk: push af push bc push de push hl call SpriteDma ; Tiles The main...
... sprite updates ld a,1 ld (VblnkFlag),a pop hl pop de pop bc pop af reti 2.8. Video 2.8.1. Each byte contains a Page 22 V 1.01 2.7.3. Background wraps around the screen (i.e. Registers SCROLLX and SCROLLY hold the coordinates of background to be displayed on the opposite side.) An area of...of 256x256 pixels or 32x32 tiles (8x8 pixels each . Only 160x144 pixels can be displayed. when part of 32 bytes each ). Low-Power Mode Game BoyTM CPU Manual ; **** V-Blank Interrupt Routine **** Vblnk: push af push bc push de push hl call SpriteDma ; Tiles The main...
Manual
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Sprites GameBoy video controller can be displayed per scan line. When sprites with different x coordinate values overlap, the one with the same x coordinate values overlap, they are ... 8x16 pixels. Sprite patterns have priority according to table ordering. (i.e. $FE00 - OAM is ignored and treated as tiles, but they have the same format as 0. Game BoyTM CPU Manual 2.8.2. Sprites 2.8.2. Because of a limitation of sprite) = SpriteY - 16 by DP Page 25 In 8x16 sprite mode, the least significant bit of the...
Sprites GameBoy video controller can be displayed per scan line. When sprites with different x coordinate values overlap, the one with the same x coordinate values overlap, they are ... 8x16 pixels. Sprite patterns have priority according to table ordering. (i.e. $FE00 - OAM is ignored and treated as tiles, but they have the same format as 0. Game BoyTM CPU Manual 2.8.2. Sprites 2.8.2. Because of a limitation of sprite) = SpriteY - 16 by DP Page 25 In 8x16 sprite mode, the least significant bit of the...
Manual
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by these instructions. Sprite RAM Bug There is a flaw in the GameBoy hardware that causes trash to be written to OAM RAM if the following commands are used while their 16-bit content is set to 1 and from OBJ1PAL if this bit is in the range of $FE00 to $FEFF: inc xx dec xx (xx = bc,de, or hl) ldi a,(hl) ldd a,(hl) ldi (hl),a ldd (hl),a Only sprites 1 & 2 ($FE00 & $FE04) are taken from OBJ0PAL otherwise. 2.8.3. Game BoyTM CPU Manual 2.8.2. Sprites Bit4 Palette number Sprite colors are not affected by DP Page 27
by these instructions. Sprite RAM Bug There is a flaw in the GameBoy hardware that causes trash to be written to OAM RAM if the following commands are used while their 16-bit content is set to 1 and from OBJ1PAL if this bit is in the range of $FE00 to $FEFF: inc xx dec xx (xx = bc,de, or hl) ldi a,(hl) ldd a,(hl) ldi (hl),a ldd (hl),a Only sprites 1 & 2 ($FE00 & $FE04) are taken from OBJ0PAL otherwise. 2.8.3. Game BoyTM CPU Manual 2.8.2. Sprites Bit4 Palette number Sprite colors are not affected by DP Page 27
Manual
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...the cartridge. When overflow occurs at 0, the cancellation of both output terminals. Page 28 V 1.01 There is operating at all times while producing sound. GameBoy circuitry allows producing sound in four different ways: Quadrangular wave patterns with envelope functions. Voluntary wave ...patterns from wave RAM. When the sound output is reset and the sound output stops: 1. By initializing sound 3, it starts it's function. Sound Game ...
...the cartridge. When overflow occurs at 0, the cancellation of both output terminals. Page 28 V 1.01 There is operating at all times while producing sound. GameBoy circuitry allows producing sound in four different ways: Quadrangular wave patterns with envelope functions. Voluntary wave ...patterns from wave RAM. When the sound output is reset and the sound output stops: 1. By initializing sound 3, it starts it's function. Sound Game ...
Manual
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This frequency increments the Timer Counter (TIMA). When it overflows, it 's useful to 262144 Hertz Page 30 V 1.01 Timer Sometimes it generates an interrupt. The timer in the GameBoy has a selectable frequency of Timer Modulo (TMA). It is then loaded with the contents of 4096, 16384, 65536, or 262144 Hertz. 2.10. The following...),a ;Set TMA to divide clock by 4 ;Set clock to have a timer that interrupts at regular intervals for routines that require periodic or percise updates. Timer Game BoyTM CPU Manual 2.10.
This frequency increments the Timer Counter (TIMA). When it overflows, it 's useful to 262144 Hertz Page 30 V 1.01 Timer Sometimes it generates an interrupt. The timer in the GameBoy has a selectable frequency of Timer Modulo (TMA). It is then loaded with the contents of 4096, 16384, 65536, or 262144 Hertz. 2.10. The following...),a ;Set TMA to divide clock by 4 ;Set clock to have a timer that interrupts at regular intervals for routines that require periodic or percise updates. Timer Game BoyTM CPU Manual 2.10.
Manual
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... internal, the bits are no external clock is enabled, this port. If internal clock is selected and serial interrupt is present. Serial I /O port on the game link port and it stays high when not used. The rate of transfer. When the internal clock is shifted out. After this bit is set... in and out first. mined by whether the clock source is deter- During a transfer it drives the clock pin on the Gameboy is a very simple setup and is enabled. Game BoyTM CPU Manual 2.11. The most significant bit is enabled, an interrupt will go low eight times to standard RS-232 (IBMPC...
... internal, the bits are no external clock is enabled, this port. If internal clock is selected and serial interrupt is present. Serial I /O port on the game link port and it stays high when not used. The rate of transfer. When the internal clock is shifted out. After this bit is set... in and out first. mined by whether the clock source is deter- During a transfer it drives the clock pin on the Gameboy is a very simple setup and is enabled. Game BoyTM CPU Manual 2.11. The most significant bit is enabled, an interrupt will go low eight times to standard RS-232 (IBMPC...
Manual
Page 32
...shifted out determines the state of synchronization with internal clock is performed and no external GameBoy is set & the corresponding IE flag is present, a value of the interrupt....shifted into $FF01: ld a,$75 ld ($FF01),a ld a,$81 ld ($FF02),a 2.12. Page 32 V 1.01 Interrupt Procedure The IME (interrupt master enable) flag is set . 2. The PC (program counter) is generated,...of $FF will be received in the transfer. The following 3 steps are performed. 3. Serial I/O Game BoyTM CPU Manual allows a certain amount of the output line until another transfer takes place. When an ...
...shifted out determines the state of synchronization with internal clock is performed and no external GameBoy is set & the corresponding IE flag is present, a value of the interrupt....shifted into $FF01: ld a,$75 ld ($FF01),a ld a,$81 ld ($FF02),a 2.12. Page 32 V 1.01 Interrupt Procedure The IME (interrupt master enable) flag is set . 2. The PC (program counter) is generated,...of $FF will be received in the transfer. The following 3 steps are performed. 3. Serial I/O Game BoyTM CPU Manual allows a certain amount of the output line until another transfer takes place. When an ...
Manual
Page 61
... by DP Page 61 The F register is indirectly accessible by the by pairing them up in the following manner: AF,BC,DE, & HL. Generally The GameBoy has instructions & registers similar to GameBoy. 3.2. CPU Registers 3.2.1. Game BoyTM CPU Manual 3. Game Boy command overview 3. Game Boy command overview 3.1.
... by DP Page 61 The F register is indirectly accessible by the by pairing them up in the following manner: AF,BC,DE, & HL. Generally The GameBoy has instructions & registers similar to GameBoy. 3.2. CPU Registers 3.2.1. Game BoyTM CPU Manual 3. Game Boy command overview 3. Game Boy command overview 3.1.
Manual
Page 63
... key to keep track of the top of RAM space that has been allocated for other uses that were generated by DP Page 63 The GameBoy Stack Pointer is used for saving variables, saving return addresses, passing arguments to $E000 using the by the programmer of low RAM space ($C000... as well.) As information is executed. The instructions POP, RET, and RETI all put onto the stack, the stack grows downward in RAM memory. Game BoyTM CPU Manual 3.2.3. The Program Counter from this location in assembly language on the stack and remove it at the top of the ROM cart. 3.2.4....
... key to keep track of the top of RAM space that has been allocated for other uses that were generated by DP Page 63 The GameBoy Stack Pointer is used for saving variables, saving return addresses, passing arguments to $E000 using the by the programmer of low RAM space ($C000... as well.) As information is executed. The instructions POP, RET, and RETI all put onto the stack, the stack grows downward in RAM memory. Game BoyTM CPU Manual 3.2.3. The Program Counter from this location in assembly language on the stack and remove it at the top of the ROM cart. 3.2.4....