Intel X38ML - Server Board Motherboard Support and Manuals

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Product Specification - Page 4

...3.4.2 Memory Population Rules 15 3.5 I/O Subsystem ...16 3.5.1 PCI Express* x16 Riser Slot 16 3.5.2 SATA Support...16 3.5.3 Video Support ...17 3.5.4 Network Interface Controller (NIC 17 3.5.5 USB Support...17 3.5.6 Super I/O Chip ...18 3.6 Replacing the Back-Up Battery 19 4. Introduction ...1 1.1 Server Board Use Disclaimer 1 2. Table of Contents Intel® Server Board X38ML...
Product Specification - Page 20

...Server Board X38ML does not provide support for the IA-32 instruction set, while supporting 64-bit native mode operation when coupled with an LGA775 socket. The chipset consists of two components that work together to the Intel® Server Board X38ML support Web site: http://support.intel.com/support/motherboards/server/X38ML/. 3.2 Intel® X38 Chipset The Intel® Server Board X38ML...
Product Specification - Page 21

... between the Intel® X38 MCH and the Intel® ICH9-R. The ICH9R is packaged in each chipset component as two x1 ports or one x2. Intel® Server Board X38ML Functional Architecture The following sub-sections provide an overview of the primary functions and supported features of each direction. DDR2 - 667, 800 MHz - 8 GB addressable memory - One PCI...
Product Specification - Page 24

... processor - Functional Architecture Intel® Server Board X38ML The SPI Flash Memory device is integrated onto the server board. Two independent 10/100 Ethernet controllers with master-slave support - Watchdog timer - DDR2 16-bit up to digital converters 12 Revision 1.3 Intel order number E15331-006 These system management functions report errors, diagnose the system, and...
Product Specification - Page 27

...only fully qualified DIMMs are supported on the board. 3.4.2 Memory Population Rules The X38 MCH supports two DDR2 DIMM sockets for Channel A, and two DDR2 DIMM sockets for Channel B. The maximum memory capacity supported is at http://support.intel.com/support/motherboards/server/X38ML/. Note: All DIMMs are supported by Intel or a designated memory test vendor are partitioned with...
Product Specification - Page 38

System BIOS Intel® Server Board X38ML Main Advance d Security Server Management Boot Options Boot Manager Logged in as Platform ID BIOS Version 26 Figure 5. Setup Utility - Main Screen Fields Options N/A N/A Help Text N/A N/A N/A N/A Comments Information only. With no passwords set, Administrator is running in as Platform ID BIOS Version S3200X38.86B.xx.yy.zzzz ...
Product Specification - Page 50

...also clears the user password. Security Screen Fields Setup Item Administrator Password Status Options User Password Status Set Administrator Password [123abcd] Set User Password [123abcd] Front Panel Lockout Enabled Disabled Help Text N/A N/A Administrator password is 7 characters. System BIOS Intel® Server Board X38ML Main Advanced Security Server Management Boot Options...
Product Specification - Page 54

... -System Information Screen Display Setup Item Board Part Number Board Serial Number System Part Number System Serial Number Chassis Part Number Chassis Serial Number BMC Firmware Revision HSC Firmware Revision SDR Revision UUID Table 17. To access this screen from the Server Management screen. System BIOS Intel® Server Board X38ML 4.3.2.4.2 System Information Screen The System...
Product Specification - Page 63

... process by setting the recovery jumper. The system boots the EFI SHELL. 5. The user runs Update.NSH. The system loads and executes the flash update application, IFLASH32.EFI. DO NOT INTERRUPT THE POST PROCESS AT THE FIRST BOOT. 4.7 OEM Logo A firmware volume is reserved for recovery is updated independently of other firmware volumes. Intel® Server Board X38ML System BIOS...
Product Specification - Page 72

... when the timer expires. Platform Management Intel® Server Board X38ML 5.4.5 BMC Command Used to Reset System Chassis Control is not up yet) No Yes (if configured) BMC Reset Yes Yes No 5.5.1 BMC Exits Firmware Update When completing a firmware update, the BMC resets. See the Intelligent Platform Management Interface Specification, Version 2.0. 5.5 BMC Reset Control Table 30...
Product Specification - Page 100

... is required to be selected. The UNDI driver should be included with the server configuration. Refer to the SMBIOS structure tables in BIOS EPS about the server components. Entering the user password allows the user to prevent unauthorized tampering with the network interface card. Platform Management Intel® Server Board X38ML Legacy Console Redirection: The BIOS enables...
Product Specification - Page 103

... more information on the secondary side, as long as follows: PCI bus Memory single- The SMI handler sends a command to the BMC to log the event and provides the data to be instructed to the server management firmware. The correctable PCI Express* errors are configured so that they generate an SERR# on the primary interface...
Product Specification - Page 104

... isolate the failure down to the system event log. Error Reporting and Handling Intel® Server Board X38ML the BMC as PCI Express* Bus Uncorrectable errors. The SMI handler records the error and the DIMM location to a single DIMM may have corrupted the contents of the handler. 6.2.2.4 Memory Bus Error The hardware is equivalent to the BMC during early...
Product Specification - Page 109

... bits are set in the upper and lower nibbles then both bits are logged in troubleshooting a system hang during a BMC cold reset or a firmware update. 6.3 Error Messages and Error Codes The system BIOS displays POST error codes and error messages on the back edge of ACh to be executed. In the following example, the BIOS sends a value of the server board. As...
Product Specification - Page 115

...bus SMART not supported ATA/ATAPI ATA SMART is "disabled". The default value is disabled PCI Express* component encountered a PERR error PCI Express* component encountered a SERR error PCI Express* IBIST error DXE boot services driver not enough memory available to shadow a legacy option ROM. Revision 1.3 103 Intel order number E15331-006 When this option by setting "POST Error Pause" to...

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