User Manual
Page 6
... bezel, it is recommended that only trained professionals install this DVD Rewriteable drive into your drive. Software Driver Toshiba's SD-R6472 drive does not require any unique device drivers for Windows '98/2000/XP/NT. If you prefer using DOS, download the ATAPI driver from our web site. 4 SD-R6472 Toshiba recommends that a clearance of the four screws must be left...
... bezel, it is recommended that only trained professionals install this DVD Rewriteable drive into your drive. Software Driver Toshiba's SD-R6472 drive does not require any unique device drivers for Windows '98/2000/XP/NT. If you prefer using DOS, download the ATAPI driver from our web site. 4 SD-R6472 Toshiba recommends that a clearance of the four screws must be left...
User Manual
Page 9
... dirty Clean it with a soft damp cloth. SD-R6472 Problem Disc tray cannot be opened Drive is not recognized by system Drive is not recognized by system during Boot process, but is the DVD Rewriteable drive recognized? (BIOS / DOS reports "device driver not found " or "no valid DVD drivers selected."). Power Cable, Interface Cable and Audio Cables). •...
... dirty Clean it with a soft damp cloth. SD-R6472 Problem Disc tray cannot be opened Drive is not recognized by system Drive is not recognized by system during Boot process, but is the DVD Rewriteable drive recognized? (BIOS / DOS reports "device driver not found " or "no valid DVD drivers selected."). Power Cable, Interface Cable and Audio Cables). •...
Product Specification
Page 20
The data length of ATA-Packet Interface for 3.5 V operation 8 mA Driver IoH sink current Driver capacitive loading Table 1 Cable parameters Max 0.46 m -400 µA 25 pF 14 / 28 TS-L532A (SD-R6472) Rev.1.1 5. POWER ON or ATAPI-RST System Initialization Focus Search Spindle ON Max. ...2 (Mar. 13, 2003), SFF-8020i (Small Form Factor Committee Specification of each block can be changed by "TEST UNIT READY" Command CD: 20s, DVD 2 Layer: 18s, Max. 60s (Single Session Disc) "Check Condition" Status Figure 7 Initialization Sequence "Read Command" Acceptable "Good" Status 6. Power ON...
The data length of ATA-Packet Interface for 3.5 V operation 8 mA Driver IoH sink current Driver capacitive loading Table 1 Cable parameters Max 0.46 m -400 µA 25 pF 14 / 28 TS-L532A (SD-R6472) Rev.1.1 5. POWER ON or ATAPI-RST System Initialization Focus Search Spindle ON Max. ...2 (Mar. 13, 2003), SFF-8020i (Small Form Factor Committee Specification of each block can be changed by "TEST UNIT READY" Command CD: 20s, DVD 2 Layer: 18s, Max. 60s (Single Session Disc) "Check Condition" Status Figure 7 Initialization Sequence "Read Command" Acceptable "Good" Status 6. Power ON...
Product Specification
Page 21
... The interface part consists of single-end TTL receivers or equivalent, and signals are transferred through the 50P connector as shown in this drive. 15 / 28 TS-L532A (SD-R6472) Rev.1.1 Signal Specifications Figure 8 shows the Signal Specifications. Name Rx HD0-HD15 /DASP /PDIAG Rs1 Rs2 IORDY Rx Rs Type P N P.../HRD HA0-HA2 /HCS1/HCS3 /HDAK Rx Rs RESET (/RSTA) 100kOHM 1kOHM Timing Control VOH VOL IOL CO Voltage Output High Voltage Output Low Driver Sink Current Output Capacitance Vdd-0.4V 0.4V 24mA 15pF IOH=400µA IOL=12mA Rs=22 OHM /INTQ /HDRQ VIH Input HIGH Voltage VIL ...
... The interface part consists of single-end TTL receivers or equivalent, and signals are transferred through the 50P connector as shown in this drive. 15 / 28 TS-L532A (SD-R6472) Rev.1.1 Signal Specifications Figure 8 shows the Signal Specifications. Name Rx HD0-HD15 /DASP /PDIAG Rs1 Rs2 IORDY Rx Rs Type P N P.../HRD HA0-HA2 /HCS1/HCS3 /HDAK Rx Rs RESET (/RSTA) 100kOHM 1kOHM Timing Control VOH VOL IOL CO Voltage Output High Voltage Output Low Driver Sink Current Output Capacitance Vdd-0.4V 0.4V 24mA 15pF IOH=400µA IOL=12mA Rs=22 OHM /INTQ /HDRQ VIH Input HIGH Voltage VIL ...
Product Specification
Page 24
... asserted. Timing of Host Interface (Ultra DMA) Figure 11 shows the timings of Host Interface (Ultra DMA Mode 2) 18 / 28 TS-L532A (SD-R6472) Rev.1.1 6.2.4. t2CYC tCYC tDVS tDVH tUI tACK tENV tZAD tZIORDY tFS tRFS tRP tLI tMLI Ultra DMA Mode 2 Timing parameters min (ns) max (ns... time allowing Data valid Setup time Data valid Hold time Unlimited Interlock time Setup and Hold Time for DMACKEnvelope time Minimum Delay time for Driver Minimum time for DMACKFirst STROBE time Ready-to-Final STROBE time Ready-to-Pause time Limited Interlock time Interlock with minimum Min time (ns...
... asserted. Timing of Host Interface (Ultra DMA) Figure 11 shows the timings of Host Interface (Ultra DMA Mode 2) 18 / 28 TS-L532A (SD-R6472) Rev.1.1 6.2.4. t2CYC tCYC tDVS tDVH tUI tACK tENV tZAD tZIORDY tFS tRFS tRP tLI tMLI Ultra DMA Mode 2 Timing parameters min (ns) max (ns... time allowing Data valid Setup time Data valid Hold time Unlimited Interlock time Setup and Hold Time for DMACKEnvelope time Minimum Delay time for Driver Minimum time for DMACKFirst STROBE time Ready-to-Final STROBE time Ready-to-Pause time Limited Interlock time Interlock with minimum Min time (ns...