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Popular AMD AMD-K6-2/450 Manual Pages
Design Guide - Page 2
...Pentium is a service mark of Sale, AMD assumes no representations or warranties with Advanced Micro Devices, Inc. ("AMD") products. ...specifications and product descriptions at any intellectual property right. AMD reserves the right to discontinue or make changes to its products including, but not limited to, the implied warranty of merchantability, fitness for use as set forth in AMD...
Design Guide - Page 4
... Processor Signature 61 Identifying Supported Features 63 Determining Instruction Set Support 64 Detection Algorithm for Determining Instruction Set Support 65 AMD Processor Signature (Extended Function 66 Displaying the Processor's Name 66 Displaying Cache Information 67 Determining AMD PowerNow!™ Technology Information . . 67 Sample Code 67
New AMD-K6™ Processor Instructions...
Design Guide - Page 14
... additional register to determine specific function support. Table 1.
Table 1 shows the features of each member. Preliminary Information Embedded AMD-K6™ Processors BIOS Design Guide
23913A/0-November 2000
Processor Models and Steppings
Four models within these processors only. AMD PowerNow!™ Stepping microns) of processors.
2
Processor Models and Steppings For most...
Design Guide - Page 16
... set and a 100MHz processor bus, the AMD-K6-2E+ processor contains a 128Kbyte backside L2 cache. Model 8/[F:8] is any of ten MSRs. instruction set and a 100-MHz processor bus. s Low-power versions of twelve MSRs.
4
Processor Models and Steppings Preliminary Information Embedded AMD-K6™ Processors BIOS Design Guide
23913A/0-November 2000
AMD-K6™-2E Embedded Processor
Model...
Design Guide - Page 17
...Information Embedded AMD-K6™ Processors BIOS Design Guide
AMD-K6™-III Processor
Model 9/[3:0]
In addition to supporting the 3DNow! It also supports the 3DNow! s Model D/[3:0] implements the same ten MSRs as the Model 8/[F:8].
s Model 9/[3:0] implements the same ten MSRs as the Model 8/[F:8].
instruction set and a 100MHz processor bus, the AMD-K6-III processor contains...
Design Guide - Page 24
...
Figure 1. Preliminary Information Embedded AMD-K6™ Processors BIOS Design Guide
23913A/0-November 2000
Check for CPUID instruction support
CPUID instruction
No
supported
No CPUID instruction-Use other CPU brands
Store returned Standard Function Feature bits and
Processor Signature; technology information for the
processor
Tune software to gather AMD PowerNow! Yes Execute CPUID...
Design Guide - Page 69
... and software to return a complete picture about the processor, including the vendor, model number, revision (stepping), features, cache organization, and processor name. 23913A/0-November 2000
Preliminary Information Embedded AMD-K6™ Processors BIOS Design Guide
Embedded AMD Processor Recognition
The CPUID instruction provides a simple way for dramatically better performance on...
Design Guide - Page 70
... in future generations of the CPUID instruction. Preliminary Information Embedded AMD-K6™ Processors BIOS Design Guide
23913A/0-November 2000
s Standard functions provide a simple method for a user program to detect and handle illegal instruction exceptions. If an exception occurs, the processor does not have CPUID support.
The CPUID sample code described on page 71 contains...
Design Guide - Page 74
... register obtained by Function 1
Table 29. Table 29 summarizes the specific processor signature values returned for AMD-K6™ Processors
Processor
AMD-K6E Processor (Model 7) AMD-K6-2 Processor (Model 8) AMD-K6-2E Processor (Model 8) AMD-K6-III Processor (Model 9) AMD-K6-2E+ Processor (Model D) AMD-K6-IIIE+ Processor (Model D)
Instruction Family
0101b (5h)
0101b (5h)
0101b (5h)
0101b (5h...
Design Guide - Page 75
....
1
1
14 MCA (Machine Check Architecture) Machine check architecture is present on all AMD processors
0
0
22
AMD Multimedia Instruction Extensions
AMD additions to the original MMX™ instruction set
are returned in the
5 Model-Specific Registers (with processor, and the RDMSR and WRMSR instructions 1
1
RDMSR and WRMSR)
are supported.
6 PAE (Page Address Extensions)
Page...
Design Guide - Page 76
... AMD-K6™ Processors BIOS Design Guide
23913A/0-November 2000
Table 30. Attempting to determine if the processor executes the MMX technology instructions. "Appendix A" on page 71, and "Appendix B" on page 81 contain details on bit values. 2. See the AMD Extensions to the 3DNow!™ and MMX™ Instructions Sets Manual, order#
22466. instructions are supported.3
31 AMD...
Design Guide - Page 77
...23913A/0-November 2000
Preliminary Information Embedded AMD-K6™ Processors BIOS Design Guide
Detection Algorithm for Determining Instruction Set Support
To simplify the detection of OS support for the additional architected registers. Establish that the highest standard function is supported. MMX instruction support is available from AMD's website at least 8000_0001h, execute CPUID...
Design Guide - Page 78
... the ASCII NULL character (00h). Preliminary Information Embedded AMD-K6™ Processors BIOS Design Guide
23913A/0-November 2000
3DNow! Figure 30 shows the contents returned in the EAX register.
31
12 11 8 7 4 3 0
Reserved
Generation/Family
11-8
Model
7-4
Stepping
3-0
Figure 30. Extensions Test
AMD Multimedia Instruction Extensions Test
10. To simplify the display routines...
Design Guide - Page 83
... AMD-K6™ Processors BIOS Design Guide
Appendix A
CPUID
mnemonic
opcode description
CPUID
0F A2h Identify the processor and its feature set
Privilege:
none
Registers Affected: EAX, EBX, ECX, EDX
Flags Affected:
none
Exceptions Generated: none
The CPUID instruction is an application-level instruction that the CPUID instruction is supported. In general, all AMD processors support...
Design Guide - Page 95
... Embedded AMD-K6™ Processors BIOS Design Guide
Index
A
Address Generation 31 AMD PowerNow!™ Technology
determining information 67 enabling EPM features 54 enhanced power management register (EPMR 54 EPM 16-byte I /O Block 55 EPM Stop Grant Clock Control State 55 EWBE# Signal 24-26 Extended Feature Enable Register (EFER) EWBEC settings (table 26 model 8‰[F:8 24 models...
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