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Data Sheet - Page 2
...set forth in this document are provided in the described manner. Other product names used in AMD's Standard Terms and Conditions of Sale, AMD... changes to specifications and product ...AMD's products are for a particular purpose, or infringement of Advanced Micro Devices, Inc. Trademarks AMD, the AMD logo, K6, 3DNow!, and combinations thereof, K86, and Super7 are trademarks, and AMD-K6...
Data Sheet - Page 4
...AMD-K6®-2 Processor Model 8/[F:8] Registers 50 Extended Feature Enable Register (EFER) -Model 8/[F:8] . 50 Write Handling Control Register (WHCR)-Model 8/[F:8] . . 51 UC/WC Cacheability Control Register (UWCCR)52 Processor State Observability Register (PSOR 53 Page Flush/Invalidate Register (PFIR 53 3.3 Instructions Supported by the AMD-K6®-2 Processor... (Data/Code 97 4.... Error 102...
Data Sheet - Page 8
AMD-K6®-2 Processor Data Sheet
Preliminary ...Model 264 15.3 I/O Model Application Note 265 15.4 I/O Buffer AC and DC Characteristics 265
16 Signal Switching Characteristics 267
16.1 CLK Switching Characteristics 267 16.2 Clock Switching Characteristics for 100-MHz Bus
Operation 268 16.3 Clock Switching Characteristics for 66-MHz Bus
Operation 268 16.4 Valid Delay, Float, Setup...
Data Sheet - Page 13
... 2000
Preliminary Information
AMD-K6®-2 Processor Data Sheet
List of Figures
Figure 75. MSR C000_0085h (Model 8/[F:8 204 Figure 84. External Logic for Supporting Floating-Point Exceptions....Model 8/[7:0 187 Figure 80. UC/WC Cacheability Control Register (UWCCR)- Processor Heat Dissipation Path 290 Figure 107.
Input Setup and Hold Timing 282 Figure 100. Thermal Model...
Data Sheet - Page 19
... Register (PFIR)-MSR C000_0088h," and PFIR's bit descriptions. F Updated Chapter 21, "Ordering Information" on page 81. Added 533 MHz specifications.
F Added 450 MHz (VCC2 = 2.4 V) specifications to Table 14, "Integer Instructions," on page 55. Updated
Chapter 21, "Ordering Information". Changed AMD-K6-2/400AFX to AMD-K6-2/400AFR in Chapter 14, "Electrical Data", Chapter 17, "Thermal...
Data Sheet - Page 26
...instruction coding efficiencies found in the current AMD-K6-2 processor and those added in x86 programs.
The AMD-K6-2 processor contains parallel decoders, a centralized RISC86 operation scheduler, and ten execution units that support superscalar operation - The AMD-K6-2 processor... x86 instruction set while observing the RISC performance principles of data cache. AMD-K6®-2 Processor Data ...
Data Sheet - Page 29
... cache and a 32-Kbyte data cache with the introduction of the x86 processor family with two-way set associativity. This specialized target cache does this by avoiding a one cache on the AMD-K6-2 processor is a unique device specifically designed for predicting conditional branches. Cache, Instruction Prefetch, and Predecode Bits
The writeback level-one clock cache-fetch penalty...
Data Sheet - Page 33
... x86 instruction set of RISC86 operations and a vector (initial ROM address) to a sequence of decoders-two parallel short decoders, one long decoder, and one of the three types of decoders are generated by the long decoder.
All of the common, and a few of the grouping. 21850J/0-February 2000
Preliminary Information
AMD-K6®-2 Processor Data...
Data Sheet - Page 122
... # signal. AMD-K6®-2 Processor Data Sheet
Preliminary Information
21850J/0-February 2000
4.22
Summary
Driven
FERR# (Floating-Point Error)
Output
The assertion of FERR # indicates the occurrence of an unmasked floating-point exception resulting from the execution of RESET
FERR # is always driven except in the Tri-State Test mode. instruction, or WAIT instruction that occurs...
Data Sheet - Page 251
... between TDI and TDO.
TAP Instructions
The processor supports the three instructions required by the BYPASS and HIGHZ instructions as well as two additional optional instructions - IDCODE and HIGHZ. EXTEST. Table 50 shows the complete set of the BSR and significantly reduces test time. These instruction encodings are undefined on the AMD-K6-2 processor and default to bypass the...
Data Sheet - Page 278
...70°C
Note 4
TCASE
0°C
65°C
Note 5
Notes:
1. The AMD-K6-2 processor is designed to the following OPNs:
s AMD-K6-2/550AGR s AMD-K6-2/533AFX s AMD-K6-2/500AFX s AMD-K6-2/475AFX s AMD-K6-2/450AFX s AMD-K6-2/400AFR
Note: The electrical specifications for all frequencies of the OPN suffix AFR other than 400 MHz are provided in Table 56. Table 56. Case temperature range required...
Data Sheet - Page 280
...3.6 V - AMD-K6®-2 Processor Data Sheet
Preliminary Information
21850J/0-February 2000
Table 58. The specifications provided for OPN Suffixes AGR, AFX, and 400AFR (continued)
Symbol
Parameter Description
Preliminary Data
Min
Max
Comments
10.00 A
400 MHz, Note 2, 8, 10
11.25 A
450 MHz, Note 2, 10
2.2 V Power Supply Current ICC2
11.90 A 12.50 A
475 MHz, Note 2, 9 500 MHz, Note...
Data Sheet - Page 282
This specification applies to components using a CLK frequency of the 500 MHz component.
262
Electrical Data
Chapter 14
The maximum power dissipated in the normal clock control state must be taken into account when designing a solution for thermal dissipation for OPN Suffixes AGR, AFX, and 400AFR
Clock Control State
400 450 MHz6,8 MHz8
475 MHz7
500 533 550 MHz8...
Data Sheet - Page 307
...to OPN AMD-K6-2/400AFR.
2.
Specifications are identical to the specifications of a processor
w it h a p a s sive t h e rm a l so l u t i on . The specifications provided for OPN Suffixes AGR, AFX, and 400AFR
θJC Junction-Case
1.0 °C/W
Maximum Thermal Power
2.2 V Component
2.3 V Component
400 MHz1 450 MHz 475 MHz 500 MHz 533 MHz2
16.90 W 18.80 W 19.80 W
20.75 W
550 MHz 25...
Data Sheet - Page 321
... Rating /550 /533 /500 /475 /450 /400 /380 /350 /333 /300 /266
Family/Core AMD-K6-2
Table 74. Consult the local AMD sales office to check on newly-released combinations. Chapter 21
Ordering Information
301 21850J/0-February 2000
Preliminary Information
AMD-K6®-2 Processor Data Sheet
21 Ordering Information
Standard AMD-K6®-2 Processor Model 8 Products
AMD standard products...
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