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Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 13.4 Cache Inhibit 263 13.5 L2 Cache and Tag Array Testing 264 13.6 Debug 268 14 Clock Control 275 14.1 ... for 100-MHz Bus Operation 296 16.3 Clock Switching Characteristics for 66-MHz Bus Operation 297 16.4 Valid Delay, Float, Setup, and Hold Timings 298 16.5 Output Delay Timings for 100-MHz Bus Operation 298 16.6 Input Setup and Hold Timings for 100-MHz Bus Operation 300 16.7 Output Delay Timings for 66-MHz Bus Operation 302 16.8 Input Setup and Hold Timings for 66-MHz Bus Operation...
Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 13.4 Cache Inhibit 263 13.5 L2 Cache and Tag Array Testing 264 13.6 Debug 268 14 Clock Control 275 14.1 ... for 100-MHz Bus Operation 296 16.3 Clock Switching Characteristics for 66-MHz Bus Operation 297 16.4 Valid Delay, Float, Setup, and Hold Timings 298 16.5 Output Delay Timings for 100-MHz Bus Operation 298 16.6 Input Setup and Hold Timings for 100-MHz Bus Operation 300 16.7 Output Delay Timings for 66-MHz Bus Operation 302 16.8 Input Setup and Hold Timings for 66-MHz Bus Operation...
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... for LowPower AMD-K6™-2E+ Processors Enabled with AMD PowerNow!™ Technology 290 CLK Switching Characteristics for 100-MHz Bus Operation . 296 CLK Switching Characteristics for 66-MHz Bus Operation . . 297 Output Delay Timings for 100-MHz Bus Operation 298 Input Setup and Hold Timings for 100-MHz Bus Operation . 300 Output Delay Timings for 66-MHz Bus Operation 302 Input Setup and Hold Timings for 66-MHz Bus Operation . . 304...
... for LowPower AMD-K6™-2E+ Processors Enabled with AMD PowerNow!™ Technology 290 CLK Switching Characteristics for 100-MHz Bus Operation . 296 CLK Switching Characteristics for 66-MHz Bus Operation . . 297 Output Delay Timings for 100-MHz Bus Operation 298 Input Setup and Hold Timings for 100-MHz Bus Operation . 300 Output Delay Timings for 66-MHz Bus Operation 302 Input Setup and Hold Timings for 66-MHz Bus Operation . . 304...
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...Currently, over the 66-MHz Socket 7 interface - Accelerated Graphics Port Support Accelerated Graphics Port (AGP) support improves the performance of Socket 7 with existing Socket 7 solutions; All AMD-K6 embedded processors in CPGA packages ...AMD-K6 processors like the AMD-K6-2E+ processor, which features a full-speed, internal backside 128-Kbyte L2 cache designed to enable new levels of chipsets that support the AGP specification, and support for the 100-MHz frontside bus and AGP graphics. 100-MHz Processor Bus The AMD-K6-2E+ processor supports a 100-MHz, 800 Mbyte/second frontside bus...
...Currently, over the 66-MHz Socket 7 interface - Accelerated Graphics Port Support Accelerated Graphics Port (AGP) support improves the performance of Socket 7 with existing Socket 7 solutions; All AMD-K6 embedded processors in CPGA packages ...AMD-K6 processors like the AMD-K6-2E+ processor, which features a full-speed, internal backside 128-Kbyte L2 cache designed to enable new levels of chipsets that support the AGP specification, and support for the 100-MHz frontside bus and AGP graphics. 100-MHz Processor Bus The AMD-K6-2E+ processor supports a 100-MHz, 800 Mbyte/second frontside bus...
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... in Table 55 on page 286- This specification applies to 400-MHz part only). 5. VCC2 = 2.1 V - This specification applies to components using a CLK frequency of 66 MHz (66-MHz bus applies to components using a CLK frequency of 100 MHz. 4. The maximum power supply current must be taken into ... 3.6 V-The maximum power supply current must be taken into account when designing a power supply. 7. Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 Table 58. VCC3 refers to the voltage being applied to inputs with an internal pulldown ...
... in Table 55 on page 286- This specification applies to 400-MHz part only). 5. VCC2 = 2.1 V - This specification applies to components using a CLK frequency of 66 MHz (66-MHz bus applies to components using a CLK frequency of 100 MHz. 4. The maximum power supply current must be taken into ... 3.6 V-The maximum power supply current must be taken into account when designing a power supply. 7. Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 Table 58. VCC3 refers to the voltage being applied to inputs with an internal pulldown ...
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... of 66 MHz. 3. AMD PowerNow! The active application power measurements were taken by running , but most internal clocking has stopped. 7. Note that 250-MHz operation is determined for the worst-case instruction sequence or function for the AMD-K6-2E+ processor. 5. Table 61. This specification applies to exclusion of Supported Operating Frequencies2 450-200 MHz 400-200 MHz 350-200 MHz...
... of 66 MHz. 3. AMD PowerNow! The active application power measurements were taken by running , but most internal clocking has stopped. 7. Note that 250-MHz operation is determined for the worst-case instruction sequence or function for the AMD-K6-2E+ processor. 5. Table 61. This specification applies to exclusion of Supported Operating Frequencies2 450-200 MHz 400-200 MHz 350-200 MHz...
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.../0-September 2000 16.1 CLK Switching Characteristics Table 62 and Table 63 on page 297 contain the switching characteristics of the CLK input to the AMD-K6-2E+ processor for 100-MHz and 66-MHz bus operation, respectively, as one of the elements of clock skew between successive periods of CLK)/3 or less than (Frequency of the CLK input...
.../0-September 2000 16.1 CLK Switching Characteristics Table 62 and Table 63 on page 297 contain the switching characteristics of the CLK input to the AMD-K6-2E+ processor for 100-MHz and 66-MHz bus operation, respectively, as one of the elements of clock skew between successive periods of CLK)/3 or less than (Frequency of the CLK input...
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23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Index Numerics 0.18-Micron Process Technology 7 100-MHz Bus clock switching characteristics 296 frontside 1, 8 input setup and hold timings 300 output delay timings 298 Super7 platform support 1, 8... floating-point and 240 instructions 89-90, 240 PREFETCH instruction 220 register operation 14 registers 35 RESET state 199 software prefetching 220 66-MHz Bus clock switching characteristics 297 input setup and hold timings 304 output delay timings 302 A A[31:3 95 A20M# Signal 94, 242...
23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Index Numerics 0.18-Micron Process Technology 7 100-MHz Bus clock switching characteristics 296 frontside 1, 8 input setup and hold timings 300 output delay timings 298 Super7 platform support 1, 8... floating-point and 240 instructions 89-90, 240 PREFETCH instruction 220 register operation 14 registers 35 RESET state 199 software prefetching 220 66-MHz Bus clock switching characteristics 297 input setup and hold timings 304 output delay timings 302 A A[31:3 95 A20M# Signal 94, 242...
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.../0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Capture-DR state 262 Capture-IR state 262 Case Temperature 317 extended 313 measuring 317 Centralized Scheduler 21 CLK switching characteristics 100-MHz bus operation 296 60-MHz bus operation 297 CLK Signal 105...figure 276-277 stop clock 193, 283 stop grant 193, 278, 281 stop grant inquire 280 switching characteristics 100-MHz bus operation 296 66-MHz bus operation 297 Coherency cache 222 writeback 227 writethrough 227 Compatibility, Floating-Point, MMX, and 3DNow! Instructions 240 ...
.../0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Capture-DR state 262 Capture-IR state 262 Case Temperature 317 extended 313 measuring 317 Centralized Scheduler 21 CLK switching characteristics 100-MHz bus operation 296 60-MHz bus operation 297 CLK Signal 105...figure 276-277 stop clock 193, 283 stop grant 193, 278, 281 stop grant inquire 280 switching characteristics 100-MHz bus operation 296 66-MHz bus operation 297 Coherency cache 222 writeback 227 writethrough 227 Compatibility, Floating-Point, MMX, and 3DNow! Instructions 240 ...
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23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Hold acknowledge cycle 168 acknowledge signal 114, 168-170 HOLD Signal 115 -initiated inquire hit to modified line 172 -initiated inquire... power-on configuration 199 processor state after INIT 203 processor state after RESET 200 register state 200 RESET requirements 200 signals sampled during RESET 199 Input capacitance 288 leakage current 288 pin float conditions (table 141 pin types (table 140 setup and hold timing 100-MHz bus operation 300 66-MHz bus operation 304 Input/Output ...
23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Hold acknowledge cycle 168 acknowledge signal 114, 168-170 HOLD Signal 115 -initiated inquire hit to modified line 172 -initiated inquire... power-on configuration 199 processor state after INIT 203 processor state after RESET 200 register state 200 RESET requirements 200 signals sampled during RESET 199 Input capacitance 288 leakage current 288 pin float conditions (table 141 pin types (table 140 setup and hold timing 100-MHz bus operation 300 66-MHz bus operation 304 Input/Output ...
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...8482; Technology. 23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Operating Ranges 285 OPN 333 Ordering Information 333 Ordering Part Number (OPN 333 Output delay timings 100-MHz bus operation 298 66-MHz bus operation 302 leakage current 288 pin float ...208 PREFETCH Instruction 17 Prefetching 17 hardware 220 PREFETCH instruction 220 software 220 Processor absolute ratings 287 AMD PowerNow!™ technology 143 block diagram 13 bus cycles 153 cache organization 4, 205 clock control 275 configuration 199 DC characteristics...
...8482; Technology. 23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Operating Ranges 285 OPN 333 Ordering Information 333 Ordering Part Number (OPN 333 Output delay timings 100-MHz bus operation 298 66-MHz bus operation 302 leakage current 288 pin float ...208 PREFETCH Instruction 17 Prefetching 17 hardware 220 PREFETCH instruction 220 software 220 Processor absolute ratings 287 AMD PowerNow!™ technology 143 block diagram 13 bus cycles 153 cache organization 4, 205 clock control 275 configuration 199 DC characteristics...
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Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 Real Mode INIT-initiated transition 196 protected mode transition 196 Register X and Y functional unit 24 pipelines 24 Registers 14, 27... 128 pin designations (table 325, 329 RESET Signal 127, 200, 278 signals sampled during reset 199 state of processor after reset 200 timing (figure 311 timing for 100-MHz bus operation 306 timing for 66-MHz bus operation 307 Return Address Stack 26 RISC86 Microarchitecture 12 RSM Instruction 246, 249 RSVD Pins 128 S SAMPLE/PRELOAD Instruction...
Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 Real Mode INIT-initiated transition 196 protected mode transition 196 Register X and Y functional unit 24 pipelines 24 Registers 14, 27... 128 pin designations (table 325, 329 RESET Signal 127, 200, 278 signals sampled during reset 199 state of processor after reset 200 timing (figure 311 timing for 100-MHz bus operation 306 timing for 66-MHz bus operation 307 Return Address Stack 26 RISC86 Microarchitecture 12 RSM Instruction 246, 249 RSVD Pins 128 S SAMPLE/PRELOAD Instruction...
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23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet HITM 113 HLDA 114 HOLD 115 IGNNE 116, 240 INIT 117, 278, 281 INTR 118, 278, 281 INV 118 KEN 119 ...Signal 132, 278 Super7 Platform 1 advantages 9 initiative 8 Switching Characteristics 296 100-MHz bus operation 296 66-MHz bus operation 297 input setup and hold timings for 100-MHz bus 300 input setup and hold timings for 66-MHz bus 304 output delay timings for 100-MHz bus 298 output delay timings for 66-MHz bus 302 signal 295 valid delay, float, setup, and hold timings 298 SYSCALL...
23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet HITM 113 HLDA 114 HOLD 115 IGNNE 116, 240 INIT 117, 278, 281 INTR 118, 278, 281 INV 118 KEN 119 ...Signal 132, 278 Super7 Platform 1 advantages 9 initiative 8 Switching Characteristics 296 100-MHz bus operation 296 66-MHz bus operation 297 input setup and hold timings for 100-MHz bus 300 input setup and hold timings for 66-MHz bus 304 output delay timings for 100-MHz bus 298 output delay timings for 66-MHz bus 302 signal 295 valid delay, float, setup, and hold timings 298 SYSCALL...