User Guide
Page 2
...Devices, Inc. MMX is a service mark, and AMD-K6 and RISC86 are trademarks, FusionE86 is a trademark of Sale, AMD assumes no representations or warranties with Advanced Micro Devices, Inc. ("AMD") products. The contents of this document are not ...Windows NT are for identification purposes only and may occur. The TAP State Diagram is granted by estoppel or otherwise, to specifications and product descriptions at any intellectual property rights is reprinted from the placement and use as set forth in AMD's Standard Terms and Conditions of Intel Corporation. © 2000...
...Devices, Inc. MMX is a service mark, and AMD-K6 and RISC86 are trademarks, FusionE86 is a trademark of Sale, AMD assumes no representations or warranties with Advanced Micro Devices, Inc. ("AMD") products. The contents of this document are not ...Windows NT are for identification purposes only and may occur. The TAP State Diagram is granted by estoppel or otherwise, to specifications and product descriptions at any intellectual property rights is reprinted from the placement and use as set forth in AMD's Standard Terms and Conditions of Intel Corporation. © 2000...
User Guide
Page 23
...2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 1 AMD-K6™-2E+ Embedded Processor The following are key features of the AMD-K6™-2E processor: s Member of the AMD-K6™E family of 32-bit embedded processors x Brings the power, performance, and value of L1 and L2 caches s Super7 platform is Socket 7-compatible x Leverages high-speed 100-MHz processor...of the AMD-K6-2+ processor with internal 128-Kbyte L2 cache x Provides higher Super7™ platform performance with reduced total system cost x Microsoft® Windows® compatible processor x ...
...2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 1 AMD-K6™-2E+ Embedded Processor The following are key features of the AMD-K6™-2E processor: s Member of the AMD-K6™E family of 32-bit embedded processors x Brings the power, performance, and value of L1 and L2 caches s Super7 platform is Socket 7-compatible x Leverages high-speed 100-MHz processor...of the AMD-K6-2+ processor with internal 128-Kbyte L2 cache x Provides higher Super7™ platform performance with reduced total system cost x Microsoft® Windows® compatible processor x ...
User Guide
Page 29
...Windows-compatible processors. The AMD-K6-2E+ processor for high-performance embedded systems. 1.2 Process Technology The AMD-K6-2E+ processor is x86 binary code compatible. Chapter 1 AMD-K6™-2E+ Embedded Processor 7 Industry-Standard x86 Architecture The AMD-K6-2E+ processor is implemented using an AMD-developed, state-of PC processors compatible with Windows® 98, Windows 95, Windows 3.x, Windows...3DNow! 23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet In addition, the processor supports advanced branch ...
...Windows-compatible processors. The AMD-K6-2E+ processor for high-performance embedded systems. 1.2 Process Technology The AMD-K6-2E+ processor is x86 binary code compatible. Chapter 1 AMD-K6™-2E+ Embedded Processor 7 Industry-Standard x86 Architecture The AMD-K6-2E+ processor is implemented using an AMD-developed, state-of PC processors compatible with Windows® 98, Windows 95, Windows 3.x, Windows...3DNow! 23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet In addition, the processor supports advanced branch ...
User Guide
Page 43
...and speculative execution. This advantage is due to the fact that the scheduler operates on page 22). 23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet MMX™ and 3DNow!™ Instructions. This equates to 24 RISC86 operations. In total, the scheduler...locations in either or both of the short decoders. 2.4 Centralized Scheduler The scheduler is the ability to examine an x86 instruction window equal to manage out-of-order execution, data forwarding, register renaming, simultaneous issue and retirement of 12 x86 instructions. A 3DNow...
...and speculative execution. This advantage is due to the fact that the scheduler operates on page 22). 23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet MMX™ and 3DNow!™ Instructions. This equates to 24 RISC86 operations. In total, the scheduler...locations in either or both of the short decoders. 2.4 Centralized Scheduler The scheduler is the ability to examine an x86 instruction window equal to manage out-of-order execution, data forwarding, register renaming, simultaneous issue and retirement of 12 x86 instructions. A 3DNow...
User Guide
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...2000 Preliminary Information AMD-K6™-2E+ Embedded Processor... Data Sheet 12 System Management Mode (SMM) 12.1 SMM is an alternate operating mode entered by way of SMIACT#. The code and data for SMM are stored in the SMM memory area, which is designed for use by an interrupt service routine. At this point the processor...SMM) 241 The processor enters SMM by the assertion of the SMI# interrupt and the processor's acknowledgment by the...service routine. The processor returns from SMM when it entered SMM. Subsequently, the processor restores its state ...
...2000 Preliminary Information AMD-K6™-2E+ Embedded Processor... Data Sheet 12 System Management Mode (SMM) 12.1 SMM is an alternate operating mode entered by way of SMIACT#. The code and data for SMM are stored in the SMM memory area, which is designed for use by an interrupt service routine. At this point the processor...SMM) 241 The processor enters SMM by the assertion of the SMI# interrupt and the processor's acknowledgment by the...service routine. The processor returns from SMM when it entered SMM. Subsequently, the processor restores its state ...